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Zynq-7000
All Programmable SoC
PCB Design Guide
UG933 (v1.8) November 7, 2014
Seitenansicht 0
1 2 3 4 5 6 ... 76 77

Inhaltsverzeichnis

Seite 1 - PCB Design Guide

Zynq-7000 All Programmable SoC PCB Design Guide UG933 (v1.8) November 7, 2014

Seite 2 - Revision History

Zynq-7000 PCB Design Guide www.xilinx.com 10UG933 (v1.8) November 7, 2014Chapter 2: PCB Technology BasicsZ-direction spacing of signal trace layers t

Seite 3 - Date Version Revision

Zynq-7000 PCB Design Guide www.xilinx.com 11UG933 (v1.8) November 7, 2014Chapter 2: PCB Technology BasicsReturn CurrentsAn often neglected aspect of

Seite 4 - Table of Contents

Zynq-7000 PCB Design Guide www.xilinx.com 12UG933 (v1.8) November 7, 2014Chapter 3Power Distribution SystemIntroductionThis chapter documents the pow

Seite 5

Zynq-7000 PCB Design Guide www.xilinx.com 13UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution Systemthe quantity per I/O bank. Device perfor

Seite 6 - Introduction

Zynq-7000 PCB Design Guide www.xilinx.com 14UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemTable 3-2 lists the decoupling requireme

Seite 7 - PCB Technology Basics

Zynq-7000 PCB Design Guide www.xilinx.com 15UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemCapacitor SpecificationsThe electrical c

Seite 8 - Pads and Antipads

Zynq-7000 PCB Design Guide www.xilinx.com 16UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemPCB Bulk CapacitorsThe purpose of the bu

Seite 9 - Dimensions

Zynq-7000 PCB Design Guide www.xilinx.com 17UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution Systeminches of the device’s outer edge is acc

Seite 10 - Transmission Lines

Zynq-7000 PCB Design Guide www.xilinx.com 18UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution Systemsupply, often referred to as ripple volt

Seite 11 - Return Currents

Zynq-7000 PCB Design Guide www.xilinx.com 19UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemFor example, if current demand in the de

Seite 12 - Power Distribution System

Zynq-7000 PCB Design Guide www.xilinx.com 2UG933 (v1.8) November 7, 2014Revision HistoryThe following table shows the revision history for this docum

Seite 13

Zynq-7000 PCB Design Guide www.xilinx.com 20UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution Systemmoves at a different rate. Because momen

Seite 14

Zynq-7000 PCB Design Guide www.xilinx.com 21UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemIf tantalum capacitors are not available

Seite 15 - Capacitor Specifications

Zynq-7000 PCB Design Guide www.xilinx.com 22UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemAs different capacitor values are select

Seite 16 - PCB High-Frequency Capacitors

Zynq-7000 PCB Design Guide www.xilinx.com 23UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution Systemplane, up through one via, through the c

Seite 17 - Basic PDS Principles

Zynq-7000 PCB Design Guide www.xilinx.com 24UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemPlane InductanceSome inductance is assoc

Seite 18

Zynq-7000 PCB Design Guide www.xilinx.com 25UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution Systembetween power and ground planes decrease

Seite 19 - Role of Inductance

Zynq-7000 PCB Design Guide www.xilinx.com 26UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution System• Both mounting inductances are reduced

Seite 20

Zynq-7000 PCB Design Guide www.xilinx.com 27UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution System• Ceramic chip capacitors with a lower E

Seite 21 - UG933_c3_05_032811

Zynq-7000 PCB Design Guide www.xilinx.com 28UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemLMOUNT= 0.8 nH (based on PCB mounting ge

Seite 22 - PCB Current Path Inductance

Zynq-7000 PCB Design Guide www.xilinx.com 29UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemCapacitor Placement BackgroundTo perform

Seite 23 - UG933_c3_07_032811

Zynq-7000 PCB Design Guide www.xilinx.com 3UG933 (v1.8) November 7, 201412/04/2013 1.6Changed “DDR3” to “DDR3/3L” throughout document. Updated capaci

Seite 24 - Plane Inductance

Zynq-7000 PCB Design Guide www.xilinx.com 30UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemAnother delay of the same duration occur

Seite 25 - AP SoC Mounting Inductance

Zynq-7000 PCB Design Guide www.xilinx.com 31UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemUnconnected VCCO PinsIn some cases, one

Seite 26 - Capacitor Effective Frequency

Zynq-7000 PCB Design Guide www.xilinx.com 32UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemPDS MeasurementsMeasurements can be used

Seite 27

Zynq-7000 PCB Design Guide www.xilinx.com 33UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution System• Place the oscilloscope in infinite per

Seite 28 - Capacitor Anti-Resonance

Zynq-7000 PCB Design Guide www.xilinx.com 34UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemThe measurement shown in Figure 3-8 and

Seite 29

Zynq-7000 PCB Design Guide www.xilinx.com 35UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemExcessive noise at a certain frequency i

Seite 30 - Power Supply Consolidation

Zynq-7000 PCB Design Guide www.xilinx.com 36UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemOptimum Decoupling Network DesignIf a hi

Seite 31 - Simulation Methods

Zynq-7000 PCB Design Guide www.xilinx.com 37UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution Systemspecially designed capacitor network can

Seite 32 - PDS Measurements

Zynq-7000 PCB Design Guide www.xilinx.com 38UG933 (v1.8) November 7, 2014Chapter 3: Power Distribution SystemOther improvements of geometry are via-i

Seite 33 - UG933_c3_08_032811

Zynq-7000 PCB Design Guide www.xilinx.com 39UG933 (v1.8) November 7, 2014Chapter 4SelectIO SignalingIntroductionThe Zynq-7000 AP SoC SelectIO resourc

Seite 34 - UG933_c3_09_032811

Zynq-7000 PCB Design Guide www.xilinx.com 4UG933 (v1.8) November 7, 2014Table of ContentsRevision History . . . . . . . . . . . . . . . . . . . . . .

Seite 35

Zynq-7000 PCB Design Guide www.xilinx.com 40UG933 (v1.8) November 7, 2014Chapter 4: SelectIO Signalingthe VIL threshold, the state is considered Low.

Seite 36 - UG933_c3_10_032811

Zynq-7000 PCB Design Guide www.xilinx.com 41UG933 (v1.8) November 7, 2014Chapter 4: SelectIO SignalingSome I/O standards have attributes to control d

Seite 37 - Troubleshooting

Zynq-7000 PCB Design Guide www.xilinx.com 42UG933 (v1.8) November 7, 2014Chapter 4: SelectIO SignalingThe SelectIO standards can be used in countless

Seite 38

Zynq-7000 PCB Design Guide www.xilinx.com 43UG933 (v1.8) November 7, 2014Chapter 4: SelectIO SignalingIn general, parallel resistive termination (RP)

Seite 39 - SelectIO Signaling

Zynq-7000 PCB Design Guide www.xilinx.com 44UG933 (v1.8) November 7, 2014Chapter 4: SelectIO SignalingParallel termination can be less desirable than

Seite 40 - Single-Ended Signaling

Zynq-7000 PCB Design Guide www.xilinx.com 45UG933 (v1.8) November 7, 2014Chapter 4: SelectIO SignalingThe SSTL standards tend to not have rigid requi

Seite 41 - Topographies and Termination

Zynq-7000 PCB Design Guide www.xilinx.com 46UG933 (v1.8) November 7, 2014Chapter 4: SelectIO SignalingThe main transmission line should be kept as sh

Seite 42 - UG933_c4_01_031711

Zynq-7000 PCB Design Guide www.xilinx.com 47UG933 (v1.8) November 7, 2014Chapter 4: SelectIO Signalingtopography is point-to-point or multi-point def

Seite 43 - UG933_c4_04_031711

Zynq-7000 PCB Design Guide www.xilinx.com 48UG933 (v1.8) November 7, 2014Chapter 4: SelectIO SignalingIn general, parallel resistive termination (RP)

Seite 44 - HSTL Class I

Zynq-7000 PCB Design Guide www.xilinx.com 49UG933 (v1.8) November 7, 2014Chapter 4: SelectIO Signalingexternal precision resistors placed on the VRN

Seite 45

Zynq-7000 PCB Design Guide www.xilinx.com 5UG933 (v1.8) November 7, 2014Chapter 6: Migration from XC7Z030-SBG485 to XC7Z015-CLG485 DevicesIntroductio

Seite 46 - UG933_c4_06_031711

Zynq-7000 PCB Design Guide www.xilinx.com 50UG933 (v1.8) November 7, 2014Chapter 4: SelectIO SignalingLVTTL and LVCMOS do not specify any canonical t

Seite 47 - UG933_c4_08_031711

Zynq-7000 PCB Design Guide www.xilinx.com 51UG933 (v1.8) November 7, 2014Chapter 5Processing System (PS) Power and SignalingPowerZynq-7000 AP SoC dev

Seite 48 - UG933_c4_11_031711

Zynq-7000 PCB Design Guide www.xilinx.com 52UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and Signalingcapacitor to the adjace

Seite 49 - UG933_c4_12_031711

Zynq-7000 PCB Design Guide www.xilinx.com 53UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingPS DDR Power SuppliesVC

Seite 50 - HSTL CLASS II DCI

Zynq-7000 PCB Design Guide www.xilinx.com 54UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingPS_DDR_VRN, PS_DDR_VRP

Seite 51 - Chapter 5

Zynq-7000 PCB Design Guide www.xilinx.com 55UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingMIO[7] and MIO[8] are d

Seite 52 - – PS PLL Supply

Zynq-7000 PCB Design Guide www.xilinx.com 56UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingPS Clock and ResetPS_CL

Seite 53 - UG933_c5_10_020713

Zynq-7000 PCB Design Guide www.xilinx.com 57UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingDynamic MemoryZynq-7000

Seite 54 - CCO_MIO1

Zynq-7000 PCB Design Guide www.xilinx.com 58UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingUnused DDR pins should

Seite 55

Zynq-7000 PCB Design Guide www.xilinx.com 59UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingX-Ref Target - Figure 5

Seite 56

Zynq-7000 PCB Design Guide www.xilinx.com 6UG933 (v1.8) November 7, 2014Chapter 1IntroductionAbout This GuideThis guide provides information on PCB d

Seite 57 - Dynamic Memory

Zynq-7000 PCB Design Guide www.xilinx.com 60UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingX-Ref Target - Figure 5

Seite 58 - Dynamic Memory Implementation

Zynq-7000 PCB Design Guide www.xilinx.com 61UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingDDR Supply VoltagesTabl

Seite 59 - UG585_c30_04_022814

Zynq-7000 PCB Design Guide www.xilinx.com 62UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingDDR TerminationFor bett

Seite 60 - UG933_c5_05_020614

Zynq-7000 PCB Design Guide www.xilinx.com 63UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingIn addition, DDR signal

Seite 61 - DDR Supply Voltages

Zynq-7000 PCB Design Guide www.xilinx.com 64UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingNote: For PS_DDR_DQxx,

Seite 62 - DDR Trace Length

Zynq-7000 PCB Design Guide www.xilinx.com 65UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingMIO/EMIO IP Layout Guid

Seite 63 - DDR Routing Topology

Zynq-7000 PCB Design Guide www.xilinx.com 66UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and Signalingthe Zynq-7000 AP SoC de

Seite 64 - UG585_c30_07_091913

Zynq-7000 PCB Design Guide www.xilinx.com 67UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingQSPIThe clock, data, an

Seite 65 - MIO/EMIO IP Layout Guidelines

Zynq-7000 PCB Design Guide www.xilinx.com 68UG933 (v1.8) November 7, 2014Chapter 5: Processing System (PS) Power and SignalingEquation 5-3For Fmax1,

Seite 66 - USB ULPI

Zynq-7000 PCB Design Guide www.xilinx.com 69UG933 (v1.8) November 7, 2014Chapter 6Migration from XC7Z030-SBG485 to XC7Z015-CLG485 DevicesIntroduction

Seite 67 - (requirement)

Zynq-7000 PCB Design Guide www.xilinx.com 7UG933 (v1.8) November 7, 2014Chapter 2PCB Technology BasicsIntroductionPrinted circuit boards (PCBs) are e

Seite 68

Zynq-7000 PCB Design Guide www.xilinx.com 70UG933 (v1.8) November 7, 2014Chapter 6: Migration from XC7Z030-SBG485 to XC7Z015-CLG485 DevicesFunctional

Seite 69 - XC7Z015-CLG485 Devices

Zynq-7000 PCB Design Guide www.xilinx.com 71UG933 (v1.8) November 7, 2014Chapter 6: Migration from XC7Z030-SBG485 to XC7Z015-CLG485 Devicesconnected

Seite 70 - PCB Layout Considerations

Zynq-7000 PCB Design Guide www.xilinx.com 72UG933 (v1.8) November 7, 2014Appendix AAdditional Resources and Legal NoticesXilinx ResourcesProduct Supp

Seite 71 - Software Considerations

Zynq-7000 PCB Design Guide www.xilinx.com 73UG933 (v1.8) November 7, 2014Appendix A: Additional Resources and Legal NoticesSolution CentersSee the Xi

Seite 72 - Xilinx Resources

Zynq-7000 PCB Design Guide www.xilinx.com 74UG933 (v1.8) November 7, 2014Appendix A: Additional Resources and Legal Notices°UG479, Xilinx 7 Series FP

Seite 73 - References

Zynq-7000 PCB Design Guide www.xilinx.com 75UG933 (v1.8) November 7, 2014Appendix A: Additional Resources and Legal NoticesXilinx ISE Design Suite ht

Seite 74 - Design Tool Documents

Zynq-7000 PCB Design Guide www.xilinx.com 76UG933 (v1.8) November 7, 2014Appendix A: Additional Resources and Legal Notices°ARM Debug Interface v5.1

Seite 75 - Xilinx Problem Solvers

Zynq-7000 PCB Design Guide www.xilinx.com 77UG933 (v1.8) November 7, 2014Appendix A: Additional Resources and Legal Noticesterms contained in a licen

Seite 76

Zynq-7000 PCB Design Guide www.xilinx.com 8UG933 (v1.8) November 7, 2014Chapter 2: PCB Technology BasicsTracesA trace is a physical strip of metal (u

Seite 77

Zynq-7000 PCB Design Guide www.xilinx.com 9UG933 (v1.8) November 7, 2014Chapter 2: PCB Technology BasicsLandsFor the purposes of soldering surface mo

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